MSP430混合信号微控制器外文文献及翻译

本科毕业设计外文文献及译文文献、资料题目：MPS430 Mixed Signal Microcontroller文献、资料来源：期刊（著作、网络等）文献、资料发表（出版）日期：2005.3.25学 院：信息与电气工程学院专 业： 通信工程班 级： 通信姓 名： 学 号： 指导教师： 翻译日期： xx建筑大学毕业设计外文文献及译文外文文献：MSP430 MIXED SIGNAL MICROCONTROLLER_ Low Supply-Voltage Range, 1.8 V . . . 3.6 V_ Ultralow-Power Consumption: Active Mode: 330A at 1 MHz, 2.2 V Standby Mode: 1.1A Off Mode (RAM Retention): 0.1A_ Five Power-Saving Modes_ Wake-Up From Standby Mode in less than 6s_ 16-Bit RISC Architecture, 125-ns Instruction Cycle Time_ Three-Channel Internal DMA_ 12-Bit A/D Converter With InternalReference, Sample-and-Hold and Autoscan Feature_ Dual 12-Bit D/A Converters With Synchronization_ 16-Bit Timer_A With Three Capture/Compare Registers_ 16-Bit Timer_B With Three or Seven Capture/Compare-With-Shadow Registers_ On-Chip Comparator_ Serial Communication Interface (USART0), Functions as Asynchronous UART or Synchronous SPI or I2CTM Interface_ Serial Communication Interface (USART1), Functions as Asynchronous UART or Synchronous SPI Interface_ Supply Voltage Supervisor/Monitor With Programmable Level Detection_ Brownout Detector_ Bootstrap Loader_ Serial Onboard Programming, No External Programming Voltage NeededProgrammable Code Protection by SecurityFuse_ Family Members Include: MSP430F155:16KB+256B Flash Memory512B RAM MSP430F156:24KB+256B Flash Memory1KB RAM MSP430F157:32KB+256B Flash Memory,1KB RAM MSP430F167:32KB+256B Flash Memory,1KB RAM MSP430F168:48KB+256B Flash Memory,2KB RAM MSP430F169:60KB+256B Flash Memory,2KB RAM MSP430F1610:32KB+256B Flash Memory5KB RAM MSP430F1611:48KB+256B Flash Memory10KB RAM MSP430F1612:55KB+256B Flash Memory5KB RAM_ Available in 64-Pin Quad Flat Pack (QFP) and 64-pin QFN (see Available Options)_ For Complete Module Descriptions, See the MSP430x1xx Family Users Guide,Literature Number SLAU049descriptionThe Texas Instruments MSP430 family of ultralow power microcontrollers consist of several devices featuring different sets of peripherals targeted for various applications. The architecture, combined with five low power modes is optimized to achieve extended battery life in portable measurement applications. The device features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that attribute to maximum code efficiency.The digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in less than 6s.The MSP430x15x/16x/161x series are microcontroller configurations with two built-in 16-bit timers, a fast 12-bitA/D converter, dual 12-bit D/A converter, one or two universal serial synchronous/asynchronouscommunication interfaces (USART), I2C, DMA, and 48 I/O pins. In addition, the MSP430x161x series offersextended RAM addressing for memory-intensive applications and large C-stack requirements. Typical applications include sensor systems, industrial control applications, hand-held meters, etc.MSP430F169 MIXED SIGNAL MICROCONTROLLERshort-form descriptionCPUThe MSP430 CPU has a 16-bit RISC architecture that is highly transparent to the application. All operations, other than program-flow instructions, are performed as register operations inconjunction with seven addressing modes for source operand and four addressing modes fordestination operand.The CPU is integrated with 16 registers that provide reduced instruction execution time. The register-to-register operation execution time is one cycle of the CPU clock.Four of the registers, R0 to R3, are dedicated as program counter, stack pointer, status register, and constant generator respectively. The remaining registers are general-purpose registers.Peripherals are connected to the CPU using data, address, and control buses, and can be handled with all instructions.instruction setThe instruction set consists of 51 instructions with three formats and seven address modes. Each instruction can operate on word and byte data.operating modesThe MSP430 has one active mode and five software selectable low-power modes of operation. An interrupt event can wake up the device from any of the five low-power modes, service the request and restore back to the low-power mode on return from the interrupt program.The following six operating modes can be configured by software:_ Active mode AM; All clocks are active_ Low-power mode 0 (LPM0); CPU is disabledACLK and SMCLK remain active. MCLK is disabled_ Low-power mode 1 (LPM1); CPU is disabledACLK and SMCLK remain active. MCLK is disabledDCOs dc-generator is disabled if DCO not used in active mode_ Low-power mode 2 (LPM2); CPU is disabledMCLK and SMCLK are disabledDCOs dc-generator remains enabledACLK remains active_ Low-power mode 3 (LPM3); CPU is disabledMCLK and SMCLK are disabledDCOs dc-generator is disabledACLK remains active_ Low-power mode 4 (LPM4); CPU is disabledACLK is disabledMCLK and SMCLK are disabledDCOs dc-generator is disabledCrystal oscillator is stoppedinterrupt vector addressesThe interrupt vectors and the power-up starting address are located in the address range 0FFFFh 0FFE0h.The vector contains the 16-bit address of the appropriate interrupt-handler instruction sequencespecial function registersMost interrupt and module-enable bits are collected in the lowest address space. Special-function register bits not allocated to a functional purpose are not physically present in the device. This arrangement provides simple software access.interrupt enable 1 and 2WDTIE: Watchdog timer interrupt enable. Inactive if watchdog mode is selected.Active if watchdog timer is configured as general-purpose timer.OFIE: Oscillator-fault-interrupt enableNMIIE: Nonmaskable-interrupt enableACCVIE: Flash memory access violation interrupt enableURXIE0: USART0: UART and SPI receive-interrupt enableUTXIE0: USART0: UART and SPI transmit-interrupt enableURXIE1 : USART1: UART and SPI receive-interrupt enableUTXIE1 : USART1: UART and SPI transmit-interrupt enableURXIE1 and UTXIE1 are not present in MSP430x15x devices.interrupt flag register 1 and 2WDTIFG: Set on watchdog-timer overflow (in watchdog mode) or security key violationReset on VCC power-on, or a reset condition at the RST/NMI pin in reset modeOFIFG: Flag set on oscillator faultNMIIFG: Set via RST/NMI pinURXIFG0: USART0: UART and SPI receive flagUTXIFG0: USART0: UART and SPI transmit flagURXIFG1 : USART1: UART and SPI receive flagUTXIFG1 : USART1: UART and SPI transmit flagmodule enable registers 1 and 2URXE0: USART0: UART mode receive enableUTXE0: USART0: UART mode transmit enableUSPIE0: USART0: SPI mode transmit and receive enableURXE1 : USART1: UART mode receive enableUTXE1 : USART1: UART mode transmit enableUSPIE1 : USART1: SPI mode transmit and receive enableURXE1, UTXE1, and USPIE1 are not present in MSP430x15x devices.flash memoryThe flash memory can be programmed via the JTAG port, the bootstrap loader, or in-system by the CPU. The CPU can perform single-byte and single-word writes to the flash memory. Features of the flash memory include:_ Flash memory has n segments of main memory and two segments of information memory (A and B) of 128 bytes each. Each segment in main memory is 512 bytes in size._ Segments 0 to n may be erased in one step, or each segment may be individually erased._ Segments A and B can be erased individually, or as a group with segments 0n. Segments A and B are also called information memory._ New devices may have some bytes programmed in the information memory (needed for test during manufacturing). The user should perform an erase of the information memory prior to the first use.peripheralsPeripherals are connected to the CPU through data, address, and control busses and can be handled using all instructions. For complete module descriptions, see the MSP430x1xx Family Users Guide, literature number SLAU049.DMA controllerThe DMA controller allows movement of data from one memory address to another without CPU intervention.For example, the DMA controller can be used to move data from the ADC12 conversion memory to RAM. Using the DMA controller can increase the throughput of peripheral modules. The DMA controller reduces system power consumption by allowing the CPU to remain in sleep mode without having to awaken to move data to or from a peripheral.oscillator and system clockThe clock system in the MSP430x15x and MSP430x16x(x) family of devices is supported by the basic clock module that includes support for a 32768-Hz watch crystal oscillator, an internal digitally-controlled oscillator (DCO) and a high frequency crystal oscillator. The basic clock module is designed to meet the requirements of both low system cost and low-power consumption. The internal DCO provides a fast turn-on clock source and stabilizes in less than 6 s. The basic clock module provides the following clock signals:_ Auxiliary clock (ACLK), sourced from a 32768-Hz watch crystal or a high frequency crystal._ Main clock (MCLK), the system clock used by the CPU._ Sub-Main clock (SMCLK), the sub-system clock used by the peripheral modules.brownout, supply voltage supervisorThe brownout circuit is implemented to provide the proper internal reset signal to the device during power on and power off. The supply voltage supervisor (SVS) circuitry detects if the supply voltage drops below a user selectable level and supports both supply voltage supervision (the device is automatically reset) and supply voltage monitoring (SVM, the device is not automatically reset). The CPU begins code execution after the brownout circuit releases the device reset. However, VCC may not have ramped to VCC(min) at that time. The user must insure the default DCO settings are not changed until VCC reaches VCC(min). If desired, the SVS circuit can be used to determine when VCC reaches VCC(min).digital I/OThere are six 8-bit I/O ports implementedports P1 through P6:_ All individual I/O bits are independently programmable._ Any combination of input, output, and interrupt conditions is possible._ Edge-selectable interrupt input capability for all the eight bits of ports P1 and P2._ Read/write access to port-control registers is supported by all instructions.watchdog timerThe primary function of the watchdog timer (WDT) module is to perform a controlled system restart after a software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog function is not needed in an application, the module can be configured as an interval timer and can generate interrupts at selected time intervals.hardware multiplier (MSP430x16x/161x Only)The multiplication operation is supported by a dedicated peripheral module. The module performs 16_16, 16_8, 8_16, and 8_8 bit operations. The module is capable of supporting signed and unsigned multiplication as well as signed and unsigned multiply and accumulate operations. The result of an operation can be accessed immediately after the operands have been loaded into the peripheral registers. No additional clock cycles are required.peripheralsPeripherals are connected to the CPU through data, address, and control busses and can be handled using all instructions. For complete module descriptions, see the MSP430x1xx Family Users Guide, literature number SLAU049.DMA controllerThe DMA controller allows movement of data from one memory address to another without CPU intervention. For example, the DMA controller can be used to move data from the ADC12 conversion memory to RAM. Using the DMA controller can increase the throughput of peripheral modules. The DMA controller reduces system power consumption by allowing the CPU to remain in sleep mode without having to awaken to move data to or from a peripheral.oscillator and system clockThe clock system in the MSP430x15x and MSP430x16x(x) family of devices is supported by the basic clock module that includes support for a 32768-Hz watch crystal oscillator, an internal digitally-controlled oscillator (DCO) and a high frequency crystal oscillator. The basic clock module is designed to meet the requirements of both low system cost and low-power consumption. The internal DCO provides a fast turn-on clock source and stabilizes in less than 6s. The basic clock module provides the following clock signals:_ Auxiliary clock (ACLK), sourced from a 32768-Hz watch crystal or a high frequency crystal._ Main clock (MCLK), the system clock used by the CPU._ Sub-Main clock (SMCLK), the sub-system clock used by the peripheral modules.brownout, supply voltage supervisorThe brownout circuit is implemented to provide the proper internal reset signal to the device during power on and power off. The supply voltage supervisor (SVS) circuitry detects if the supply voltage drops below a user selectable level and supports both supply voltage supervision (the device is automatically reset) and supply voltage monitoring (SVM, the device is not automatically reset).The CPU begins code execution after the brownout circuit releases the device reset. However, VCC may not have ramped to VCC(min) at that time. The user must insure the default DCO settings are not changed until VCC reaches VCC(min). If desired, the SVS circuit can be used to determine when VCC reaches VCC(min).digital I/OThere are six 8-bit I/O ports implementedports P1 through P6:_ All individual I/O bits are independently programmable._ Any combination of input, output, and interrupt conditions is possible._ Edge-selectable interrupt input capability for all the eight bits of ports P1 and P2._ Read/write access to port-control registers is supported by all instructions.watchdog timerThe primary function of the watchdog timer (WDT) module is to perform a controlled system restart after a software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog function is not needed in an application, the module can be configured as an interval timer and can generate interrupts at selected time intervals.hardware multiplier (MSP430x16x/161x Only)The multiplication operation is supported by a dedicated peripheral module. The module performs 16_16, 16_8, 8_16, and 8_8 bit operations. The module is capable of supporting signed and unsigned multiplication as well as signed and unsigned multiply and accumulate operations. The result of an operation can be accessed immediately after the operands have been loaded into the peripheral registers. No additional clock cycles arerequired.USART0The MSP430x15x and the MSP430x16x(x) have one hardware universal synchronous/asynchronous receive transmit (USART0) peripheral module that is used for serial data communication. The USART supports synchronous SPI (3 or 4 pin), asynchronous UART and I2C communication protocols using double-buffered transmit and receive channels.The I2C support is compliant with the Philips I2C specification version 2.1 and supports standard mode (up to 100 kbps) and fast mode (up to 400 kbps). In addition, 7-bit and 10-bit device addressing modes are supported, as well as master and slave modes. The USART0 also supports 16-bit-wide I2C data transfers and has two dedicated DMA channels to maximize bus throughput. Extensive interrupt capability is also given in the I2C mode.USART1 (MSP430x16x/161x Only)The MSP430x16x(x) devices have a second hardware universal synchronous/asynchronous receive transmit (USART1) peripheral module that is used for serial data communication. The USART supports synchronous SPI (3 or 4 pin) and asynchronous UART communication protocols, using double-buffered transmit and receive channels. With the exception of I2C support, operation of USART1 is identical to USART0.timer_A3Timer_A3 is a 16-bit timer/counter with three capture/compare registers. Timer_A3 can support multiple capture/compares, PWM outputs, and interval timing. Timer_A3 also has extensive interrupt capabilities.Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare registers.timer_B3 (MSP430x15x Only)Timer_B3 is a 16-bit timer/counter with three capture/compare registers. Timer_B3 can support multiple capture/compares, PWM outputs, and interval timing. Timer_B3 also has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare registers.timer_B7 (MSP430x16x/161x Only)Timer_B7 is a 16-bit timer/counter with seven capture/compare registers. Timer_B7 can support multiple capture/compares, PWM outputs, and interval timing. Timer_B7 also has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare registers.comparator_AThe primary function of the comparator_A module is to support precision slope analogtodigital conversions, batteryvoltage supervision, and monitoring of external analog signals.ADC12The ADC12 module supports fast, 12-bit analog-to-digital conversions. The module implements a 12-bit SAR core, sample select control, reference generator and a 16 word conversion-and-control buffer. The conversion-and-control buffer allows up to 16 independent ADC samples to be converted and stored without any CPU intervention.DAC12The DAC12 module is a 12-bit, R-ladder, voltage output DAC. The DAC12 may be used in 8- or 12-bit mode, and may be used in conjunction with the DMA controller. When multiple DAC12 modules are present, they may be grouped together for synchronous operation.中文译文：MSP430混合信号微控制器 低供电电压范围：1.8V3.6V 超低功耗：活动模式：1MHz，2.2V 时为280A等待模式：1.6A关闭模式（RAM 保持）：0.1A 五种省电模式 6S 内从等待状态唤醒 16 位精简指令结构，125 纳秒指令时间周期 三个内部 DMA 通道 具有内部参考电平、采样保持和自动扫描特性的 12 位A/D 转换器 同步的双 12 位D/A 转换器 带有三个捕捉/比较寄存器的16 位定时器A 带有三个或七个捕捉/比较影子寄存器的16 位定时器B 片内集成比较器 串行通讯接口（USART1），具有异步UART 或者同步SPI 接口的功能 串行通讯接口（USART0），具有异步UART 或者同步SPI 或者I2C 接口 具有可编程电平检测的供电电压管理器/监视器 欠电压检测器 串行在线编程，无需外部编程电压，可编程的安全熔丝代码保护 Bootstrap Loader 器件系列包括：MSP430F155:16KB+256B flash 存储器512B RAMMSP430F156:24KB+256B flash 存储器1KB RAMMSP430F157:32KB+256B flash 存储器1KB RAMMSP430F167:32KB+256B flash 存储器1KB RAMMSP430F168:48KB+256B flash 存储器2KB RAMMSP430F169:60KB+256B flash 存储器2KB RAMMSP430F1610:32KB+256B flash 存储器5KB RAMMSP430F161148KB+256B flash 存储器； 10KB RAM 64 引脚Quad Flat Pack（QFP）封装 要获得完整的模块描述参见 MSP430x1xx 系列用户手册，文献号SLAU049说明德州仪器公司的 MSP430 系列超低功耗微控制器，由针对各种不同应用目标具有不同外围设备的芯片系列组成。MSP430 的结构与五种低功耗模式相结合，最适用于在便携式测量设备中延长电池寿命。芯片具有一个强大的16 位RISC CPU，16 位的寄存器以及常数发生器，能够最大限度地提高代码的效率。数字控制的振荡器（DCO）允许在6 微秒内从低功耗模式唤醒。MSP430x15x/16x/161x 系列是配置了内置16 位定时器、12 位快速A/D 转换器、双12 位D/A 转换器，一个或者两个通用同步/异步串行通讯接口（USART）、I2C、DMA和48 个I/O 引脚的微控制器。另外，MSP430x161x 系列为需要大存储器的应用和堆栈的要求提供扩展RAM 寻址。MSP430 的典型应用包括：测量系统、捕获模拟信号转换为数字值、然后处理数据用于显示或者传送到主系统。定时器使得其配置理想地使用在工业控制中，例如数字马达控制、手持式仪表、光网络中地TEC 控制，等等。MSP430F169的引脚定义简要说明CPUMSP430 CPU具有一个16位的精简指令计算机结构，对应用是高度透明的。所有的操作，除了程序流程指令，都是通过源操作数的7种寻址模式和目标操作数的四种寻址模式的组合对寄存器操作进行的。CPU集成了16个寄存器，减小了指令执行时间。寄存器到寄存器操作的执行时间是一个CPU周期。寄存器中的四个，R0到R3，相对地专用作程序计数器、堆栈指针、状态寄存器和常数发生器。其余寄存器是通用寄存器。外围通过数据、地址和控制总线连接到CPU，可以通过所有指令处理。指令集指令集由三种格式和7种寻址模式的51条指令构成。每条指令可以操作一个字或者字节。运行模式MSP430具有一种活动模式和五种软件可选的低功耗运行模式。一个中断事件可以将芯片从五种低功耗模式中的任何一种唤醒，为请求服务并在从中断程序返回时恢复低功耗模式。下列六种运行模式由软件配置： 活动模式AM：所有时钟活动 低功耗模式0（LPM0）CPU关闭ACLK和SMCLK保持活动，MCLK关闭如果DCO在活动模式中没有使用，DCO的直流发生器将关闭 低功耗模式1（LPM1）CPU关闭ACLK和SMCLK保持活动，MCLK关闭 低功耗模式2（LPM2）CPU关闭MCLK和SMCLK关闭DCO的直流发生器保持活动ACLK保持活动 低功耗模式3（LPM3）CPU关闭MCLK和SMCLK关闭DCO的直流发生器关闭ACLK保持活动 低功耗模式4（LPM4）CPU关闭ACLK关闭MC