基于单片机的视觉系统外文翻译(共7页)

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1、精选优质文档-倾情为你奉上原 文Title：VISION SYSTEM BASED ON A SINGLE-CHIP MICROCOMPUTER Vision sensors which use dynamic RAM are cheaper and easier to interface than their alternatives - videcon or CCD. Andrew Russell describes a DRAM-based intelligent vision system in which all interfacing and image processing fu

2、nctions are provided by an 8751 single-chip microcomputer The paper describes a compact and inexpensive binary vision system in which all interfacing and data processing functions are performed by an Intel 8751 single-chip microcomputer. The vision sensor is a 64k bit dynamic RAM chip which is capab

3、le of providing a picture resolution of up to 256 X 128 pixels. Picture processing algorithms are implemented within the vision system and object statistics are transferred to the host computer over a serial interface. The resulting system is implemented using only four integrated circuits and is em

4、inently suitable for component identification and inspection in a flexible manufacturing system environment. Microsystems computer vision DRAM optical sensors 8751 Computer vision systems are being used in increasing numbers for a variety of industrial inspection, part identification and control tas

5、ks. Dynamic random-access memory (DRAM) circuits have been developed as binary optical sensors for these applications 12. DRAM-based vision systems are very low in cost and have direct compatibility with digital electronics. These advantages are not shared by the alternative types of system availabl

6、e- videcon or CCD (charge coupled device) vision sensors-which are relatively expensive, were originally designed for compatibility with television displays and therefore do not provide an output which can be readily accessed by a computer. For many inspection and identification tasks the higher res

7、olution of videcon or CCD sensors is not required, and in such applications a DRAM-based system can be a more cost effective solution. This paper describes an intelligent vision sensor in which all interfacing and image processing functions are performed by an Intel 8751 single-chip microcomputer. T

8、he 8751 contains a complete 8-bit microprocessor as well as EPROM, RAM, two timers, a full duplex I/O port and parallel I/O lines g. These resources within the 8751 are used to : directly control the DRAM optical sensor, an IS32 OpticRAM manufactured by Micron Technology Inc. perform address descram

9、ble and interpolation functions on the data in the DRAM either transmit the image to a host computer in compressed form or perform image processing algorithms and transmit the resulting statistics to a host computer. The 8751-based vision system implemented contains only four integrated circuits inc

10、luding the Optic RAM. The large quantity of interfacing electronics required by similar DRAM vision systems is eliminated. In addition, a truly intelligent sensor is created by incorporating vision processing functions within the 8751. Using a dram as a vision sensorA DRAM stores information in an a

11、rray of memory cells, each consisting of a capacitor and a transistor 4. Figure 1 shows the memory cell layout. Data is read from or written to a memory cell by the following operations. An 8-bit row address is established on the DRAM address lines. Ros. address strobe (RAS) is asserted, causing the

12、 row address decoder to select one of 256 row lines. The 256 transistors Q connected to the selected row line are switched on and transfer charge from the associated capacitor C to a column line. Charge from the memory cell is regeneratively amplified and fed back onto the column lines to re-establi

13、sh the original charge on the capacitors. An 8-bit column address is presented on the DRAM address lines. Column address strobe (CAS) is asserted, initiating the selection of one out of 256 column sense amplifiers and directing its output to the data out (DOUT) pin ,the DRAM. If a memory write opera

14、tion is required data from the data in (DIN) pin would be routed to the, selected sense amplifier and hence to the appropriate memory cell. Charge on the memory cell capacitors tends to leak away. If data is to be retained the charge must be sensed before it has decayed away completely, and restored

15、 its original level. The operation of restoring memory charge is called refresh and occurs when a read or writ cycle is performed on the same row as the cell.If light incident on the capacitors their rate of charge decay increased. Thus if all capacitors are charged and a suitable length of tinqe is

16、 allowed to elapse before reading the memory cells it will be found that some of the bits haw, been corrupted. Those bits which are corrupted will come from capacitors subjected to a higher level of illumination than those which are not corrupted. If the physical layout of the. memory cells can be d

17、etermined it will be possible to locate those areas of the circuit where the light intensity, is above a certain threshold and thus to produce a image of the incident illumination. The 65 536 memory cells in the IS32 integrated circuits are grouped into two regions with an area contain sense amplifi

18、ers between them. For most applications a large gap in the visual field will be unacceptable. Camera systemA DRAM optical sensor may be interfaced to a micro- computer by direct connection to the processor address bus or indirectly via an I/O port . Connection through an I/O port is slower and requi

19、res a more complicated control program. These drawbacks are balanced by a considerable reduction in circuit complexity. The aim of this project was to produce a simple, inexpensive vision system and therefore the DRAM was connected through an I/O port .Memory refresh This process restores the charge

20、 level on memory ceil capacitors and is only stopped during image acquisition to make the memory cells sensitive to light. Timing for the refresh operation is controlled by one of the 8751, internal 16-bit counters. Counter 0 is programmed to generate an interrupt every 1.3 ms. The timer interrupt s

21、ervice routine performs a RAS-only refresh cycle on the 128 rows used to form the image. The service routine then restarts the timer and performs a return from interrupt. A large portion of the available processing time is used by the refresh operation and therefore efficient coding of this part of

22、the program is essential. Acquiring an image write ls to the memory cells inhibit interrupts pedorm a timing loop to measure the required exposure time re-enable interrupts.Reading and writing Subroutines were written to transfer data between the 8751 and Optic RAM. These subroutines control the out

23、put of 8751 ports 1 and 3 to perform read cycles and write cycles on the DRAM. Once again Boolean bit set and clear instructions are used except in those cases where more than one output line is required to change state simultaneously. In these cases it is quicker to write a byte o1 data to the I/O

24、port .Descramble and interpolation of the imageThe IS32 is a development of the GT4264 64k bit DRAM. For this reason positioning of memory cells on the silicon hip surface was presumably governed by considerations of convenient and efficient layout. The memory cells are not positioned physically on

25、the chip in the same order as they are addressed electrically. To overcome this problem a look-up table was used to convert physical addresses into electrical addresses. The 8751 provides a move constant instruction which allows indexed addressing into rogram memory using either the program counter

26、or a 16-bit data pointer register (DPTR) as base value. Acknowledgement The work reported here was supported by the Research Grant Committee of the University of Wollongong under grant 03/103/401, The automation of batch assembly. 中文为宋体、西文为Times New Roman、小四，首行缩进2字符，行距固定值22磅。 专心-专注-专业译 文题目：基于单片机的视觉系

27、统 使用动态随机存取存储器的视觉传感器比使用他们的替代品videcon或CCD更便宜、更易于接口。安德鲁罗素描述了一个动态随机存取存储器的智能可视系统，在这个系统所有接口和图像的视觉系统处理功能由8751单片机提供。 本论文阐述了一个紧凑的和廉价的二进制视觉系统，在这里的所有接口和数据处理函数是由英特尔8751单片机微机操作。视觉传感器是一个每秒64比特的DRAM芯片，能够提供一幅分辨率为256x128像素的画面。在视觉系统中实现图像处理算法和将统计数据传输到主机上都是通过串行接口完成的。所得到的系统只需要由四个集成电路实现，且非常适合于在灵活制造系统中进行成分标识和检测。微系统公司 计算机视

28、觉 动态随机存取存储器 光学传感 8751 计算机视觉系统正在被越来越多的使用，适用于各种工业检测，零件识别和控制任务等领域。为了实现这些应用程序，动态随机存取存储器电路已经被开发成二进制光学传感器。基于视觉系统的动态随机存取存储器成本非常低并且具有与数字电子技术直接的兼容性的优势。这些优势不与另一种可用“videcon”或CCD(电荷耦合装置)视觉传感器的系统类型所共享，这种类型相对昂贵，其最初设计是为了与电视显示更好的兼容，因此不能提供一个可以方便地访问计算机的输出。而对于许多检查和识别任务，这种方案对较高分辨率的videcon或CCD传感器不是必需的，在这样的应用中，基于动态随机存储器的

29、系统是一个更有效的解决方案。本文描述了一种“智能”的视觉传感器，所有接口和图像处理功能都是由英特尔8751单片机来操作控制的。8751包含一个完整的8位微处理器还有EPROM、内存、两个定时器、一个全双工的I / O端口和并行I / O线。这些资源被用于以下方面： 直接控制动态随机存取存储器光学传感器，一个由美光科技公司制造的IS32 Optic RAM。 执行地址“descramble”和插值函数在动态随机存取存储器中的数据。 图像传输到主机电脑，压缩形式或执行图像处理算法和结果统计数据传输到主机电脑。 基于单片机8751的视觉系统，它的实现过程只有四个包含Optic RAM的集成电路。大量

30、需要类似动态随机存取存储器的视觉系统的电子产品被淘汰了。此外，一个真正的智能传感器是由8751的视觉处理函数创造出来的。使用动态随机存取存储器作为视觉传感器 一个动态随机存取存储器将信息存储在一个存储单元的数组中，每一个存储单元由电容和晶体管组成。通过以下操作完成数据从一个存储单元中读取或写入一个存储单元： 一个8位行地址建立在动态随机存取存储器地址线上。 行地址闪光灯的显示，导致行地址译码器去选择一个256行线。256个晶体管Q转移电容电荷从C列线连接到所选行线。 从存储单元充电就是放大并反馈到列行而去重建原来的电容器。 一个8位的出现在动态随机存取存储器地址线上的列地址。确定选通列地址(C

31、AS)，开始选择一个256列放大器并指导其输出到DRAM的输出引脚(DOUT)端。如果一个内存写操作是必需的，从DIN引脚里取出的数据将被传送到选定的读出放大器，并且传送到适当的存储单元。在充电存储单元电容器往往发生泄漏。如果数据被保留，那么它的电荷必须在它已经完全衰减并且恢复原来的水平之前被检测。恢复内存的控制操作也被称为”刷新”，其读或写一致出现在同一行上的执行周期。如果光出现在电容器上，其充电率衰减就会增加。因而如果在所有电容器充电和合适的允许消逝长度之前阅读，那么就会发现一些存储单元被损坏。损坏的部分比那些没有损坏的从电容器受到的照明层次更高。如果存储单元是物理布局的，那么可以确定它可

32、能的存储单元，定位这些光强度电路的地区。若高于某一阈值，就会产生入射光的图像。 内存为65 536的IS32单元集成电路分为两个区域，其中一个区域为感觉放大器。对于大多数应用程序在视觉领域存在一个很大的差距将是不可以接受的。摄影时代 DRAM光学传感器可能是通过直接连接到处理器的地址总线或间接地通过一个I / O端口来与微观电脑接触。通过一个连接I / O端口时比较慢，并且需要一个更复杂的控制程序。平衡这些缺点就会相当大的减少电路的复杂性。这个项目的目的是产生一个简单、廉价的系统。内存刷新 这个过程中恢复内存对存储单元的控制，只是停止让存储单元对光线有强的敏感度。时间的刷新操作是由8751的内

33、部的一个16位计数器完成。计数器0编程每隔1.3ms产生一个中断，定时器中断服务程序在用来形成图像的128行上执行RAS-only刷新周期。然后服务程序重新启动定时器和从中断返回执行。一个大部分可用的处理时间被用于刷新操作，因此这部分有效的编码处理是至关重要的。图像的获取 1、将图像中的1s写入内存 2、抑制中断 3、定时循环测量所需的确定时间中文为宋体、西文为Times New Roman、小四，首行缩进2字符，行距固定值22磅。 4、再确认启用中断读与写 子程序的编写是为了在8751和Optic RAM之间传输数据。这些子程序控制8751端口1和3的输出，为了执行动态随机存储器中的写循环和

34、读循环。除了一个输出线是需要改变状态，其他的设置和明确的指示等这些情况都是同时进行的。在这些情况下，数据I /O端口就写入一个字节。DESCRAMBLE和插值图像 IS32是64k比特的DRAM u4264的发展产物，由于这个原因，分布在硅表面的存储单元很可能会被控制，这是通过考虑其方便和有效的布局而成的。存储单元没有定位物理芯片的顺序，他们是定位电地址。要解决这个问题需要查表并将物理地址转换成电地址。8751提供了一个常数MOVCI指令，允许变址寻址程序内存使用程序计数器或16位数据指针寄存器，并将其作为基础价值。确认这个工作报告得到了在格兰特的伍伦贡大学的委员会（被授予于03/103/401）”批处理的自动化大会”的确认。