电气电子专业单片机外文翻译

上传人:EY****y 文档编号:110026686 上传时间:2022-06-17 格式:DOC 页数:9 大小:355KB
收藏 版权申诉 举报 下载
电气电子专业单片机外文翻译_第1页
第1页 / 共9页
电气电子专业单片机外文翻译_第2页
第2页 / 共9页
电气电子专业单片机外文翻译_第3页
第3页 / 共9页
资源描述:

《电气电子专业单片机外文翻译》由会员分享,可在线阅读,更多相关《电气电子专业单片机外文翻译(9页珍藏版)》请在装配图网上搜索。

1、2008 届电气工程与自动化专业毕业设计外文翻译AT89C51DescriptionThe AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel highs-density nonvolatile memory technology and is compatible with the ind

2、ustry-standard MCS-51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provi

3、des a highly-flexible and cost-effective solution to many embedded control applications. Function characteristicThe AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full d

4、uplex serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrup

5、t system to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset. Pin DescriptionVCC :Supply voltage.GND : Ground.Port 0, Port 1, Port 2, Port3:Port 0 is an 8-bit open-drain bi-directional I/O por

6、t. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance inputs.Port 0 may also be configured to be the multiplexed loworder address/databus during accesses to external program and data memory. In this mode P0 has internal pu

7、llups.Port 0 also receives the code bytes during Flash programming,and outputs the code bytes during programverification. External pullups are required during programverification.Port 1 is an 8-bit bi-directional I/O port with internal pullups.The Port 1 output buffers can sink/source four TTL input

8、s.When 1s are written to Port 1 pins they are pulled high by the9王鲁刚:基于单片机的直流电机调速系统设计internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 1 also receives the low-order address bytes durin

9、g Flash programming and verification.Port 2 is an 8-bit bi-directional I/O port with internal pullups.The Port 2 output buffers can sink/source four TTL inputs.When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 2 pins that are ex

10、ternally being pulled low will source current, because of the internal pullups.Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses. In this application, it uses strong internal pullupswhen emitting

11、 1s. During accesses to external data memory that use 8-bit addresses, Port 2 emits the contents of the P2 Special Function Register.Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.Port 3 is an 8-bit bi-directional I/O port with int

12、ernal pullups.The Port 3 output buffers can sink/source four TTL inputs.When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.Port 3 also s

13、erves the functions of various special features of the AT89C51 as listed below:Port 3 also receives some control signals for Flash programming and verification.RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device.ALE/ PROG102008 届电气工程与自动化专业毕业设计外

14、文翻译Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for extern

15、al timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory.If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly

16、 pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.PSENProgram Store Enable is the read strobe to external program memory.When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that

17、 two PSEN activations are skipped during each access to external data memory. EA/VPPExternal Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA

18、 will be internally latched on reset.EA should be strapped to VCC for internal program executions.This pin also receives the 12-volt programming enable voltage(VPP) during Flash programming, for parts that require12-volt VPP.XTAL1 :Input to the inverting oscillator amplifier and input to the interna

19、l clock operating circuit.XTAL2 :Output from the inverting oscillator amplifier.Oscillator CharacteristicsXTAL1 and XTAL2 are the input and output, respectively,of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1.Either a quartz crystal or ceramic

20、 resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2.There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-t

21、wo flip-flop, but minimum and maximum voltage high and low time specifications must be observed.11王鲁刚:基于单片机的直流电机调速系统设计Figure 1. Oscillator ConnectionsFigure 2. External Clock Drive ConfigurationPower-down ModeIn the power-down mode, the oscillator is stopped, and the instruction that invokes power-d

22、own is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power-down mode is terminated. The only exit from power-down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before

23、VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.Program Memory Lock BitsOn the chip are three lock bits which can be left unprogrammed (U) or can be programmed(P) to obtain the additional features listed in the table

24、below.122008 届电气工程与自动化专业毕业设计外文翻译When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is powered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is necessary that the latched valu

25、e of EA be in agreement with the current logic level at that pin in order for the device to function properly.13王鲁刚:基于单片机的直流电机调速系统设计AT89C51 的介绍AT89C51 是一个低电压,高性能 CMOS 8 位单片机带有 4K 字节的可反复擦写的程序存储器( EPROM)。这种器件采用 ATMEL 公司的高密度、不容易丢失存储技术生产,并且能够与 MCS-51 系列的单片机兼容。片内含有 8 位中央处理器和闪烁存储单元,有较强的功能的 AT89C51 单片机能够被应

26、用到控制领域中。功能特性AT89C51 提供以下的功能标准: 4K 字节闪烁存储器, 128 字节随机存取数据存储器, 32 个 I/O 口, 2 个 16 位定时 /计数器, 1 个 5 向量两级中断结构, 1 个串行通信口,片内震荡器和时钟电路。 另外,AT89C51 还可以进行 0HZ 的静态逻辑操作, 并支持两种软件的节电模式。闲散方式停止中央处理器的工作,能够允许随机存取数据存储器、定时/计数器、串行通信口及中断系统继续工作。掉电方式保存随机存取数据存储器中的内容,但震荡器停止工作并禁止其它所有部件的工作直到下一个复位。引脚描述VCC :电源电压GND :地P0 口,P1 口 ,P2

27、 口,P3 口:P0 口是一组 8 位漏极开路双向I/O 口,即地址 /数据总线复用口。 作为输出口时, 每一个管脚都能够驱动8 个 TTL 电路。当“1被”写入 P0 口时,每个管脚都能够作为高阻抗输入端。P0 口还能够在访问外部数据存储器或程序存储器时,转换地址和数据总线复用,并在这时激活内部的上拉电阻。P0 口在闪烁编程时, P0 口接收指令,在程序校验时,输出指令,需要接电阻 。P1 口一个带内部上拉电阻的8 位双向 I/O 口,P1 的输出缓冲级可驱动4 个 TTL 电路。对端口写 “1,”通过内部的电阻把端口拉到高电平,此时可作为输入口。因为内部有电阻,某个引脚被外部信号拉低时输出

28、一个电流。闪烁编程时和程序校验时, P1 口接收低 8 位地址。P2 口是一个内部带有上拉电阻的8 位双向 I/O 口, P2 的输出缓冲级可驱动4 个 TTL电路。对端口写 “1,”通过内部的电阻把端口拉到高电平,此时,可作为输入口。因为内部有电阻,某个引脚被外部信号拉低时会输出一个电流。在访问外部程序存储器或16 位地142008 届电气工程与自动化专业毕业设计外文翻译址的外部数据存储器时, P2 口送出高 8 位地址数据。在访问 8 位地址的外部数据存储器时,P2 口线上的内容在整个运行期间不变。闪烁编程或校验时,P2 口接收高位地址和其它控制信号。P3 口是一组带有内部电阻的8 位双向

29、 I/O 口,P3 口输出缓冲故可驱动4 个 TTL 电路。对 P3 口写如 “1时”,它们被内部电阻拉到高电平并可作为输入端时,被外部拉低的P3 口将用电阻输出电流。P3 口除了作为一般的I/O 口外,更重要的用途是它的第二功能,如下表所示:端口引脚第二功能P3.0RXDP3.1TXDP3.2INT0P3.3INT1P3.4T0P3.5T1P3.6WRP3.7RDP3 口还接收一些用于闪烁存储器编程和程序校验的控制信号。RST复位输入。当震荡器工作时,RET 引脚出现两个机器周期以上的高电平将使单片机复位。ALE / PROG当访问外部程序存储器或数据存储器时, ALE 输出脉冲用于锁存地址

30、的低 8 位字节。即使不访问外部存储器, ALE 以时钟震荡频率的 1/16 输出固定的正脉冲信号, 因此它可对输出时钟或用于定时目的。 要注意的是:每当访问外部数据存储器时将跳过一个 ALE 脉冲时,闪烁存储器编程时,这个引脚还用于输入编程脉冲。如果必要,可对特殊寄存器区中的 8EH 单元的 D0 位置禁止 ALE 操作。这个位置后只有一条MOVX 和 MOVC 指令 ALE才会被应用。此外,这个引脚会微弱拉高,单片机执行外部程序时,应设置ALE 无效。PSEN程序储存允许输出是外部程序存储器的读选通信号,当 AT89C51 由外部程序存储器读取指令时,每个机器周期两次PSEN 有效,即输出

31、两个脉冲。在此期间,当访问外部数据15王鲁刚:基于单片机的直流电机调速系统设计存储器时,这两次有效的PSEN 信号不出现。EA/VPP外部访问允许。欲使中央处理器仅访问外部程序存储器,EA 端必须保持低电平。需要注意的是:如果加密位LBI 被编程,复位时内部会锁存EA 端状态。如 EA 端为高电平,CPU 则执行内部程序存储器中的指令。闪烁存储器编程时,该引脚加上+12V 的编程允许电压 VPP,当然这必须是该器件是使用12V 编程电压 VPP。XTAL1 :震荡器反相放大器及内部时钟发生器的输入端。XTAL2 : 震荡器反相放大器的输出端。时钟震荡器AT89C51 中有一个用于构成内部震荡器

32、的高增益反相放大器,引脚XTAL1 和 XTAL2分别是该放大器的输入端和输出端。这个放大器与作为反馈元件的片外石英晶体或陶瓷谐振器一起构成自然震荡器。 外接石英晶体及电容 C1,C2 接在放大器的反馈回路中构成并联震荡电路。对外接电容 C1,C2 虽然没有十分严格的要求,但电容容量的大小会轻微影响震荡频率的高低、震荡器工作的稳定性、起振的难易程序及温度稳定性。如果使用石英晶体,我们推荐电容使用 30PF10PF,而如果使用陶瓷振荡器建议选择 40PF10PF。用户也可以采用外部时钟。 采用外部时钟的电路如图示。 这种情况下,外部时钟脉冲接到 XTAL1 端,即内部时钟发生器的输入端, XTA

33、L2 则悬空。由于外部时钟信号是通过一个 2 分频触发器后作为内部时钟信号的,所以对外部时钟信号的占空比没有特殊要求,但最小高电平持续时间和最大的低电平持续时间应符合产品技术条件的要求。内部振荡电路外部振荡电路掉电模式在掉电模式下,振荡器停止工作,进入掉电模式的指令是最后一条被执行的指令,片162008 届电气工程与自动化专业毕业设计外文翻译内 RAM 和特殊功能寄存器的内容在中指掉电模式前被冻结。退出掉电模式的唯一方法是硬件复位,复位后将从新定义全部特殊功能寄存器但不改变RAM 中的内容,在 VCC 恢复到正常工作电平前,复位应无效切必须保持一定时间以使振荡器从新启动并稳定工作。闲散和掉电模

34、式外部引脚状态模式程序存储ALEPSENP0P1P2P3器闲散模式内部11数据数据数据数据闲散模式内部11浮空数据地址数据掉电模式外部00数据数据数据数据掉电模式外部00数据数据数据数据程序存储器的加密AT89C51 可使用对芯片上的三个加密位LB1 ,LB2 ,LB3 进行编程( P)或不编程( U)得到如下表所示的功能:程序加密位保护类型1UUU没有程序保护功能2PUU禁止从外部程序存储器中执行MOVC 指令读取内部程序存储器的内容3PPU除上表功能外,还禁止程序校验4PPP除以上功能外,同时禁止外部执行当 LB1 被编程时,在复位期间, EA 端的电平被锁存,如果单片机上电后一直没有复位,锁存起来的初始值是一个不确定数,这个不确定数会一直保存到真正复位位置。为了使单片机正常工作,被锁存的 EA 电平与这个引脚当前辑电平一致。机密位只能通过整片擦除的方法清除。17

展开阅读全文
温馨提示:
1: 本站所有资源如无特殊说明,都需要本地电脑安装OFFICE2007和PDF阅读器。图纸软件为CAD,CAXA,PROE,UG,SolidWorks等.压缩文件请下载最新的WinRAR软件解压。
2: 本站的文档不包含任何第三方提供的附件图纸等,如果需要附件,请联系上传者。文件的所有权益归上传用户所有。
3.本站RAR压缩包中若带图纸,网页内容里面会有图纸预览,若没有图纸预览就没有图纸。
4. 未经权益所有人同意不得将文件中的内容挪作商业或盈利用途。
5. 装配图网仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对用户上传分享的文档内容本身不做任何修改或编辑,并不能对任何下载内容负责。
6. 下载文件中如有侵权或不适当内容,请与我们联系,我们立即纠正。
7. 本站不保证下载资源的准确性、安全性和完整性, 同时也不承担用户因使用这些下载资源对自己和他人造成任何形式的伤害或损失。

相关资源

更多
正为您匹配相似的精品文档
关于我们 - 网站声明 - 网站地图 - 资源地图 - 友情链接 - 网站客服 - 联系我们

copyright@ 2023-2025  zhuangpeitu.com 装配图网版权所有   联系电话:18123376007

备案号:ICP2024067431-1 川公网安备51140202000466号


本站为文档C2C交易模式,即用户上传的文档直接被用户下载,本站只是中间服务平台,本站所有文档下载所得的收益归上传人(含作者)所有。装配图网仅提供信息存储空间,仅对用户上传内容的表现方式做保护处理,对上载内容本身不做任何修改或编辑。若文档所含内容侵犯了您的版权或隐私,请立即通知装配图网,我们立即给予删除!